LFSROM an algorithm for automatic design synthesis of hardware test pattern generator

摘要: The characteristic of the on-chip test pattern generator (TPG) is prime importance for overall quality a circuit with built-in self-test (BIST). authors describe in this paper new TPG architecture which basically composed shift register (SR), an OR gate network and set multiplexers. It called LFSROM it can be easily designed relatively short time even large sets. design synthesis algorithm described step-by-step way by use real example so as to show clearly key parameters considered such architecture. Furthermore, silicon area has been found smaller than that ROM considered. >