Methods and arrangements for high-speed digital-to-analog conversion

摘要: Embodiments may comprise logic such as hardware and/or code for high-speed digital-to-analog conversion of signals. Many embodiments a demultiplexer to distribute sets bits converters, the converters receive and operate concurrently convert from digital representations signal segments output analog segments, an interleaver interleave each in sequence generate signal. In many embodiments, is adapted by latching magnitudes interleaved near ends clock cycles attenuate non-linearities when are output.