Processing system with interspersed processors dma-fifo
作者： Michael R. Trocino , Carl S. Dobbs , Keith M. Bindloss
DOI:
关键词:
摘要: Embodiments of a multi-processor array are disclosed that may include plurality processors, local memories, configurable communication elements, and direct memory access (DMA) engines, DMA controller. Each processor be coupled to one the elements together in an interspersed arrangement. The controller configured control operation engines.
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