作者: Sonia Maria Holik
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摘要: The design and physical verification of contemporary integrated circuits is a challenging task due to their complexity. System-in-Package an example generally congested electronic components interconnects which in the initial process rely on computationally intensive electromagnetic simulations. Hence available computer memory capacity computational speed become meaningful limitations. An alternative method allows designer overcome or reduce limits desired. This work represents first demonstration application effective medium theory analysis those segments entire system where interconnect networks are more dense. presented approach takes advantage deep subwavelength characteristic structures. In order achieve aim defining homogeneous equivalent for grating structure few steps were followed towards proving homogenisation concept finally presenting it by analytical formulation. A set parameters (metal fill factor, aspect ratio, dielectric background period-to-wavelength ratio) with values related typical rules considered. Relating these empirical models be defined. show relationship between existing theories developed this Thesis, defined terms Maxwell-Garnett mixing rule additional scaling factor. distribution factor was analysed calculated reflection transmission coefficients homogenised structures that given geometry. Finally each model, expressed formula validated numerical structures. The validation carried out comparing obtained detailed ensure can broadly employed, performance model presence non-normally incident plane wave evaluated. For range angles ±30o accurate 5%. impact shape grating, specifically case tapered profile, actual fabricated also considered, sidewall tapers up 5o giving same error not higher than 5%. Experimental desired two main applications: reflectivity estimation whole chip lower metal layers stack. first, free-space measurements taken plate copper rods aligned parallel illuminated X-band (8.2-12.4 GHz). second, S-parameters measured microstrip waveguides number embedded substrate signal line ground plane. good agreement simulations validates interconnects.