LNA design optimization with reference to ESD protection circuitry

作者: S. Sridharan , G. Nayak , P.R. Mukund

DOI: 10.1109/ISCAS.2003.1205536

关键词:

摘要: Design of Low Noise Amplifiers (LNA) is usually done without considering the effect electrostatic discharge (ESD) protection circuitry, even though circuitry an essential and integral part system performance. In this paper, we demonstrate importance co-design LNA, with a theoretical derivation for optimization LNA Simulation, using TSMC 0.25um process, used to validate theory.

参考文章(7)
V. Chandrasekhar, K. Mayaram, Analysis of CMOS RF LNAs with ESD protection international symposium on circuits and systems. ,vol. 4, pp. 799- 802 ,(2002) , 10.1109/ISCAS.2002.1010578
C. Duvvury, ESD protection device issues for IC designs custom integrated circuits conference. pp. 41- 48 ,(2001) , 10.1109/CICC.2001.929720
P. Leroux, M. Steyaert, High-performance 5.2 GHz LNA with on-chip inductor to provide ESD protection Electronics Letters. ,vol. 37, pp. 467- 469 ,(2001) , 10.1049/EL:20010271
S. Sridharan, W. Grande, P.R. Mukund, High Q embedded inductors in silicon for RF applications international conference on asic. pp. 346- 349 ,(2002) , 10.1109/ASIC.2002.1158083
Haigang Feng, Ke Gong, A.Z. Wang, A comparison study of ESD protection for RFIC's: performance vs. parasitics international microwave symposium. ,vol. 1, pp. 235- 238 ,(2000) , 10.1109/RFIC.2000.854456
Johan Janssens, Paul Leroux, Michel Steyaert, A 0,8dB NF ESD-protected 9mW CMOS LNA IEEE Solid-State Circuits Conference, 2001. Digest of Technical Papers.. pp. 410- 411 ,(2001)