A low-power, area-efficient digital filter for decimation and interpolation
作者： B.P. Brandt , B.A. Wooley
DOI: 10.1109/4.293113
关键词:
摘要: The area and power consumption of oversampled data converters are governed largely by the associated digital decimation interpolation filters. This paper presents a low-power, area-efficient, mask-programmable filter for in digital-audio applications. Several architectural implementation features reduce complexity allow its realization die only 3670 mils/sup 2/ (2.37 mm/sup 2/) 1-/spl mu/m CMOS technology. use simple multiplier-free arithmetic logic new memory addressing scheme multi rate filters results 18.8 mW from 5-V supply 6.5 3-V supply. programmable functionality general enough to implement wide class FIR IIR single-rate multi-rate >
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