Charge pump phase locked loop

摘要: A phase lock loop circuit 60 has a frequency detector 62 , charge pump 64 an active filter 87 and voltage-controlled oscillator 100 . The generates UP DN signals indicative of the relative F R reference signal, V signal controlled by oscillator. using logic gates (buffer 66 inverter 68 ) to produce voltage drop over resistors 74 84 generate at node coupled input transmission gate 76 according values signals. When is closed (low impedance) may sink or source current inverting operational amplifier 86 open (high impedance state) electrically isolated from node.