作者: Y Hayashi , N Hamada , H Shimizu , A Osawa
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摘要: A clocking system for a magnetic memory in which signal obtained by multiplying the frequency of fixed clock factor n is applied to variable scale counter operating normally as scale-of-n-counter, and an output appearing from specific bit position this used synchronizing signal. The operated scale-of-(n-1) or scale-of-(n+1) during correction phase so that can be satisfactorily corrected with suitable inertia regardless whether carried out sector gap sector.