作者: Peter Druschel , Juan E. Navarro
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摘要: This dissertation presents the design, implementation and evaluation of a physical memory management system that allows applications to transparently benefit from superpages. The consists fewer TLB misses consequent performance improvement, which is shown be significant. The size main in workstations has been growing exponentially over past decade. As cause or consequence, working set typical increasing at similar rate. In contrast, remained small because it usually fully associative its access time must kept low since critical path every access. result, relative coverage—that is, fraction can mapped without incurring misses—has decreased by factor 100 last 10 years. Because this disparity, many modern incur large number misses, degrading as much 30% 60%, opposed 4–5% degradation reported 80's 5–10% 90's. To increase coverage size, most processors support pages sizes, called superpages . Since each superpage requires only one entry map region memory, dramatically consequently improve performance. However, supporting poses several challenges operating system, terms allocation, promotion trade-offs, fragmentation control. analyzes these issues design an effective system. An conducted through prototype for Alpha CPU, showing substantial sustained benefits. then validated further refined Itanium processor. contribution work offers complete practical solution providing applications. It tackles all trade-offs realizing potential implemented with localized changes subsystem, minimizes negative impact could observed pathological cases, therefore readily integrated into any general-purpose