Method and apparatus for interrupt redirection for arm processors

摘要: Disclosed herein is an interrupt redirection apparatus and method for inter-processor communication. The includes a plurality of ARM processors, vectored controller, command register, data register designating the contents each interrupt, signal generation unit, bus interface unit used providing read write accesses both register. controller receiving interrupts generated by hardware performing specific function under control processor peripheral hardware, transferring as request to designated master processor. designates targets kinds perform activating signal. reads activates