DSP bus monitoring apparatus and method
作者： Henry A. Davis
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摘要: A bus monitor is provided as a tool for developing, debugging and testing system having an embedded processor. The resides within the same chip or module processor, which allows connection to internal processor buses not accessible from external contacts. uses separate circular buffer continuously store, in real-time, data traces each of one more buses. Upon occurrence trigger condition, storage stops trace preserved. Trigger conditions can depend on events occurring multiple are downloaded via interface device. Data uploaded device evaluation operation.
google.co.uk 参考文章(57)
Takafumi Esaki, Yoshiyuki Uto, Yasuhiro Fukuda, Hiroshi Furukawa, Lock-in detecting circuit having variable window for checking phase locked loop and method used therein ,(1999)
James B. Southway, Jeffrey Glenn Hunt, Randall Lew Brown, Thomas Jay Perry, Michael Gilbert, Bus monitor system ,(1996)
Jerry Hongbin Hao, Bill Kolb, Autobaud/autoecho method ,(1998)
James W. Alexander, Stephen J. Peters, Ronald J. Whitsel, Terri A. Danowski, Apparatus for tracing activity on a bus of an in-circuit emulator ,(1993)
Hosein Naaseh-Shahry, Paul G. Tobin, Debug system with raw mode trigger capability ,(1996)
Victor F. Andrade, James R. Macdonald, Douglas D. Gephardt, System management mode and in-circuit emulation memory mapping and locking method ,(1994)
Martin B. Pawloski, Shared bus in-circuit emulator system and method ,(1992)
Henry W. J. Maddox, Donald J. Rathbun, Arthur Peters, Douglas J. De Angelis, William L. Saltmarsh, Bus monitor with means for selectively capturing trigger conditions ,(1989)
S.J. MacGregor, S.M. Turnbull, F.A. Tuema, O. Farish, A 100 kV, 1 kHz triggered pulse generator international power modulator symposium. pp. 153- 156 ,(1996) , 10.1109/MODSYM.1996.564474
Tetsu Tashiro, Yoshiki Cho, Microcomputer with multiple CPU'S on a single chip with provision for testing and emulation of sub CPU's ,(1994)