作者: F. Svelto , P. Erratico , S. Manzini , R. Castello
DOI: 10.1109/55.753754
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摘要: CMOS technology scaling opens up the possibility of designing variable capacitors based on a metal oxide semiconductor structure with improved tuning range and quality factor. This is due to an increase in capacitance reduction parasitic resistance. A prototype metal-oxide-semiconductor (MOS) capacitor 3.1 pF nominal value has been realized 0.35-/spl mu/m standard process. factor two change achieved for 2-V variation controlling voltage. The varactor Q ranges from 17 35, at 1.8 GHz.