摘要: It is a limiting and perhaps unnatural feature of conventional digital computers with classical von Neumann architectures that they are designed to perform only one calculation at time. Systems have been developed which allow calculations proceed the same time as input—output operations make possible some measure interleaving slow fast operations. However, any instant, computer will be carrying out basic arithmetic operation, such adding together two binary numbers, or subtracting them. Hardwired units speed up these operations, but principle remains same: instructions involving more than three numbers (multiplier, multiplicand, product, for example) must sequentially.