Development of the CRC block for Zigbee Standard on FPGA
作者： Rafidah Ahmad , Othman Sidek , Shukri Korakkottil Kunhi Mohd
DOI: 10.1109/TECHPOS.2009.5412047
关键词:
摘要: CRC (Cyclic Redundancy Check) block was developed on FPGA (Field Programmable Gate Array) in order to meet the needs for simple, low-power and low-cost wireless communication such as Zigbee. Zigbee operates primarily 2.4 GHz band, which makes technology easily applicable worldwide available. This paper gives a short overview of digital transmitter based Standard. The purpose research is diversify design methods by using Verilog code entry through Xilinx ISE 8.2i. Here, simulation measurement results are also presented verify functionality block. data rate 250 kbps.
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