作者: Yoshitaka Fujita
DOI:
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摘要: An ATM (asynchronous transfer mode) cell apparatus includes an input interface, a switch block, and OAM processing hardware block having memory unit. The interface receives SDH/SONET signal on each of plurality first paths to output corresponding the one ports path for be transferred. (operation maintenance) from port as together with number port, at least based received cell. reads out unit supplied outputs block.