Maintaining the benefits of CMOS scaling when scaling bogs down
作者： E. J. Nowak
DOI: 10.1147/RD.462.0169
关键词:
摘要: A survey of industry trends from the last two decades scaling for CMOS logic is examined in an attempt to extrapolate practical directions technology as lithography progresses toward point at which limited by size silicon atom itself. Some possible various specialized applications are explored, and it further conjectured that double-gate MOSFETs will prove be dominant device architecture this era scaling.
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