Implementation of Finite State Machines on a Reconfigurable Device

摘要: We present a novel method for the implementation of finite state machines (FSM) using reconfigurable architecture. The proposed utilises run-time reconfiguration to reduce hardware required implement FSMs. This is achieved through use unique representation FSM which allows next machine be calculated solely from primary inputs rather than and current as would traditionally required. reduction in parameters significantly reduces size block calculate state. paper presents results obtained MCNC benchmark suite that demonstrate savings around 90% majority FSMs investigated.