Programmable PCI interrupt routing mechanism

摘要: An element of a multi-functional device that integrates high performance processor into PCI to bus bridge (P2P). The invention is part design consolidates (the local processor) and other processing elements single system which utilizes memory. Four interrupt inputs are provided can be routed either or Interrupt output pins. In this manner, server designer able connect the interrupts directly without any jumpers provide configuration. Additionally, by providing software would execute on processor, intercept process low level create an intelligent I/O subsystem. A simple multiplexor used direct directs outputs. from devices connected secondary add-in cards bus. outputs go controller supports host structure. This mechanism ability have interrupts, determine if should forward upstream host.