作者: Kevin Harman , Adrian Caldow , Cindy Potter , Jon Arnold , Gareth Parker
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摘要: Direct sequence spread spectrum (DSSS) modulation has particular merit for channels subject to multipath propagation and narrowband interference. If the receiver is implemented in firmware on a field-programmable gate array (FPGA)-based platform, high-speed parallel architecture of FPGAs can be exploited realise sophisticated processing wide bandwidth DSSS signals. This chapter discusses wideband, burst-mode, 100 Mchip per second (100 Mcps) demodulator with an asynchronous feed-forward that been hosted FPGA-based digital receiver. The measured performance this given compared predicted via simulation theory. Also discussed implementation frequency domain adaptive filter interference suppression excision FPGA design issues related it.