作者: Motoi Ichihashi , Yasuhisa Shimazaki
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摘要: Disclosed is a semiconductor integrated circuit realizing improved operating speed, reduced power consumption in an active mode, standby and area of chip. A first logic gate using pair potentials VDDL, VSSL having relatively small potential difference as operation source second VDDH, VSSH large commonly use substrate VBP, VBN MIS transistors. The has high driving capability, the can operate on low power. transistor threshold voltage which increases by reverse bias decreases forward bias. By potential, even case where different states are generated at both gates, MOS transistors gates be formed common well region.