作者: Maria Hybinette , Richard Fujimoto , Don Allison , Samir Das , Kiran Panesar
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摘要: The design of the Georgia Tech Time Warp (GTW, version 2.0) executive for cache-coherent shared-memory multiprocessors is described. programmer's interface presented. Several optimizations used to efficiently realize key functions such as event list manipulation, memory and buffer management, message passing are discussed. An efficient algorithm computing GVT on Measurements a wireless personal communication services (PCS) network simulation indicate GTW simulator able sustain performance high 335,000 committed events per second this application 42-processor KSR-2 machine.