FIL-DGA based hardware optimization system

摘要: Abstract This paper presents a new algorithm entitled as dominant character genetic (DGA) along with its hardware architecture (DGA-Arch) for real parameter optimization problem. In DGA, the evolution process is inspired from characteristics present in human cognizance and it realized by varying mutation probability of genes. On other hand, DGA-Arch resource efficient, highly flexible which designed integrated field programmable gate array-in-loop (FIL) environment an overall FIL based DGA (FIL-DGA) system developed. The was implemented on Virtex IV (ML401, XC4VLX25) array (FPGA) chip maximum 5% logic slice utilization tested 18 benchmark problems. average, proposed manifested speedup about 130× over software (GA) implementation test performance also compared using 5 modified functions different GA reported existing literature found to optimize problems more accurately greater repeatability diversity. reached convergence within 0.0005–0.009% function evaluations total search space requires almost no repeated synthesis problem environment. Later, FIL-DGA has been employed adapt parameters few classical engineering world application cognitive radio