Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA

摘要: Decision trees are machine learning models commonly used in various application scenarios. In the era of big data, traditional decision tree induction algorithms not suitable for large-scale datasets due to their stringent data storage requirement. Online have been devised tackle this problem by concurrently training with incoming samples and providing inference results. However, even most up-to-date online still suffer from either high memory usage or computational intensity dependency long latency, making them challenging implement hardware. To overcome these difficulties, we introduce a new quantile-based algorithm improve Hoeffding tree, one state-of-the-art models. The proposed is light-weight terms both demand, while maintaining generalization ability. A series optimization techniques dedicated investigated hardware perspective, including coarse-grained fine-grained parallelism, dynamic memory-based resource sharing, pipelining forwarding. We further present high-performance, hardware-efficient scalable system on field-programmable gate array (FPGA) system-level techniques. Experimental results show that our outperforms method, leading 0.05% 12.3% improvement accuracy. Real implementation complete FPGA demonstrates 384x 1581x speedup execution time over design.