Physical domain error isolation and recovery in a multi-domain system

摘要: The disclosed embodiments disclose techniques for performing physical domain error isolation and recovery in a multi-domain system, where the system includes two or more processor chips one switch that provide connectivity cache-coherency support chips, are divided into distinct domains. During operation, of determines fault system. chip an originating is associated with fault, then signals identifier to its internal units, some which perform clearing operations clear out all traffic without affecting other domains