CMOS voltage reference with post-assembly curvature trim

摘要: An apparatus and method for performing curvature trim in a voltage reference circuit that allows error to be trimmed after the has been packaged. The may performed by switching segments of one or more non-linear resistors, such as n-type lightly doped drain (LDD) diffused having characteristic is opposite normal band-gap curvature. Specifically, network resistors selected via selection bits stored non-volatile memory. Since various combinations programming memory, can adjusted final packaging. This correction achieves reliable accurate variations associated with process changes.