作者: Yukio Shiraogawa , Tadao Ichikawa , Ryuichi Mori
DOI:
关键词:
摘要: An address management system includes a central processing unit (CPU) and an arranged between direct memory device (DMA) main to control access from the CPU DMA. Segment registers for expansion are provided in DMA, respectively. The conversion table converting logical data segment DMA into corresponding physical data, bit position detecting error selecting local or shared memory.