作者: 邱炳森 , Bingsen Qiu
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摘要: The present invention provides a multi-channel time-interleaved analog-to-digital converter including: clock generating circuit work for the converter; channel ADC group including number M of channels configured to be architecture, operating in turn way time division multiplexing under control and converting one high speed analog input signal low digital output signals, wherein is an integer not smaller than 2; skew detecting timing errors signals real time, acquiring parameters each relative reference channel; compensation reconstruction compensating reconstructing from on basis detected by circuit; combination combining compensated generated obtaining finally.