作者: A. Wieferink , T. Kogel , R. Leupers , H. Meyr , A. Nohl
DOI: 10.1109/ASAP.2003.1212840
关键词:
摘要: Current and future SoC designs will contain an increasing number of programmable units. To be able to tailor debug these processors in their system context at the highest possible overall simulation speed, we propose a methodology necessary tooling for multiprocessor debugging environment which allows flexible runtime tradeoff between observability speed. This approach has been applied on complex case study.