Hardware Multithreaded Transactions

摘要: Speculation with transactional memory systems helps pro- grammers and compilers produce profitable thread-level parallel programs. Prior work shows that supporting transactions can span multiple threads, rather than requiring be contained within a single thread, enables new types of speculative parallelization techniques for both programmers parallelizing compilers. Unfortunately, software support multi-threaded (MTXs) comes significant additional inter-thread communication overhead speculation validation. This make otherwise good unprofitable programs sizeable read write sets. Some using these prior MTXs overcame this problem through efforts by expert to minimize sets optimize communication, capabilities which compiler technology has been unable equivalently achieve. Instead, paper makes less laborious more feasible low-overhead validation, presenting the first complete design, implementation, evaluation hardware MTXs. Even maximal validation every load store inside tens hundreds millions instructions, complex achieved. Across 8 benchmarks, system achieves geomean speedup 99% over sequential execution on multicore machine 4 cores.