Integrated circuit yield and quality analysis methods and systems
作者： Manish Sharma , Huaxing Tang , Martin Keim , Nagesh Tamarapalli , Janusz Rajski
DOI:
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摘要: Methods, apparatus, and systems for testing, analyzing, improving integrated circuit yield quality are disclosed herein. For example, in one exemplary embodiment, design defect extraction rules derived at least partially from a set of manufacturing rules. Potential defects extracted representation an layout using the Circuit test stimuli applied during or more tests determined. Test responses resulting evaluated to identify circuits that fail occurrence failing potential types associated with tests. Information concerning repetitive identification is collected analyzed determine likelihood being present manufactured accordance layout.
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