A 140 GHz MIMO Transceiver in 45 nm SOI CMOS
作者： Arda Simsek , Seong-Kyun Kim , Mark J.W. Rodwell
DOI: 10.1109/BCICTS.2018.8550954
关键词:
摘要: This paper demonstrates a 140 GHz QPSK transceiver, designed as part of 4-channel MIMO (multi input multi output) system using 45 nm CMOS SOI technology. A direct conversion architecture is implemented. In the receiver, low noise amplifier (LNA) followed by passive double balanced down mixer and baseband amplifier; in transmitter, an active Gilbert cell IQ modulator driver amplifier. The local oscillator (LO) generated $\times 9$ multiplier. measured receiver gain 18 dB with 12 3-dB bandwidth; narrowband 145 notch, unfortunately, limits usable bandwidth. modulation bandwidth transmitter 6–8 GHz. Total power consumption 495 mW from 1 V supply. consumes 463 We show preliminary single-channel link measurements at instrument-limited 800 Mb/s data rate.
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