Approximate computing in MOS/spintronic non-volatile full-adder

作者: Weisheng Zhao , Zhaohao Wang , Lirida A.B. Naviner , Hao Cai , You Wang

DOI: 10.1145/2950067.2950101

关键词:

摘要: Approximate computing and its related topics have shown the potential in next generation systems. In this paper, new circuit level design for approximate is proposed based on non-volatile (NV) logic-in-memory structure. Two types of NV adders are implemented with reconfiguration insufficient writing current. Spin torque transfer magnetic tunnel junction (STT-MTJ) used as memory element full adder (MFA). The MFAs 28nm ultra thin body buried oxide (UTBB) fully depleted silicon-on-insulator (FD-SOI) technology. Simulation results presented including power consumption, latency, leakage power, error distance reliability performance. Low V dd strategies discussed well.

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