作者: Kevin M. Buck , Herbert L. Hess , Erik J. Mentze , David F. Cox
DOI:
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摘要: A shifter circuit comprises, in one embodiment, an input voltage divider stage comprising multiple transistors arranged a transistor stack defining plurality of intermediate nodes. The is connected between signal and ground has at least output. An inverting buffer to supply coupled the divider's configured provide inverted output signal. Means are provided for stepping up signal, receiving stepped providing level-shifted level lower than that