Processor to pre-empt voltage ramps for exit latency reductions
作者： Anupama Suryanarayanan , Avinash N. Ananthakrishnan , Jeremy J. Shrall , Craig Topper , Eric R. Heit
DOI:
关键词:
摘要: In one embodiment, a processor includes plurality of cores and power controller. This controller in turn may include voltage ramp logic to pre-empt regulator from first second voltage, responsive request for core exit low state. Other embodiments are described claimed.
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