作者: Daniel A. Beaulier
DOI:
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摘要: A circuit for digitally encoding an analog television signal by sampling is provided. The includes analog-to-digital encoder which receives both the and a generated circuit. clock generator utilized providing of frequency equal to first integral multiple desired second synchronizing component signal. phase-locked that component. divider divide provide frequency. resulting non-integral rational horizontal sync set during each blanking period predetermined state whose phase same at beginning line Vertical alignment signals on subsequent lines results.