作者: 良 山縣 , Tetsuya Takahashi , Makoto Yamagata , 徹也 ▲高▼橋
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摘要: PROBLEM TO BE SOLVED: To obtain a semiconductor integrated-circuit device in which an increase wiring pattern amount is reduced by method wherein scan-in/ scan-out control circuit controlled joint-test-action-group(JTAG) edge pin via scan circuit. SOLUTION: In scan-in operation, condition data set at register 21 from test input(TDI) 14, sent out to scan-in/scan-out 19, and the operation performed FF, be scanned, FF group 10 scanned. TDI scanned scan-out-controlled.