Radio receiver with clock signal controlled to improve the signal to noise ratio
作者： Motoki Ide , Toshifumi Sato
DOI:
关键词:
摘要: In a radio paging receiver comprising receiving section (11), decoder (12), and CPU (13) for distinguishing specific one of plurality call signals processing message signal succeeding the into processed signal, is intermittently put operation. The operation in accordance with first clock which supplied from generator (16). A switching circuit (20) selectively connects second (17). More particularly, when does not operate. frequency much higher than that signal. Therefore, processes at rapid speed
lens.org 参考文章(7)
Walter J. Grandfield, George Drapac, Pager receiver having a common timer circuit for both sequential lock-out and out-of-range ,(1989)
Giichiro Shimizu, Power-saving type receiver ,(1989)
Yoshitomo Kuwamoto, Hidefumi Kimura, Masanori Ienaka, Hideaki Watanabe, Jun'ichi Nakagawa, Power saving intermittently operated phase locked loop ,(1986)
Joan Sabin Deluca, Randi Lisa Dulaney, Communication receiver with automatic turn on/off ,(1988)
Takashi Oda, Shigeo Yoshizawa, Toshihiro Mori, Takashi Ohyagi, Pager receiver capable of avoiding an unpleasing interruption of a displayed message ,(1988)
Hideo Miyashita, Shigeo Yoshihara, Phase locked loop frequency synthesizer with battery saving circuit ,(1986)
Hiroyuki Yamaguchi, Naomi Yokoyama, Synchronous receiving method for selective calling signal ,(1987)