State machine flattening, a mapping study and tools assessment

摘要: State machine formalisms equipped with hierarchy and parallelism allow to compactly model complex system behaviours. Such models can then be transformed into executable code or inputs for model-based testing verification techniques. Generated artifacts are mostly flat descriptions of behaviour. Flattening is thus an essential step these transformations. To assess the importance flattening, we have defined applied a systematic mapping process 30 publications were finally selected. However, it appeared that flattening rarely sole focus care devoted description validation techniques varies greatly. Preliminary assessment associated tool support indicated limited availability scalability on challenging models. We see this initial investigation as first towards generic scalable support, cornerstones reliable behavioural development.