Interrupt processing apparatus, system, and method

摘要: An interrupt processing apparatus, system, and article including a machine-accessible medium, along with method of interrupts, implement in an efficient, parallel manner that reduces average latency. In one embodiment, the apparatus may include receiver coupled to plurality handlers which respond uniquely identified interrupting events. Responses occur overlapping fashion multi-threaded environment. The system processor local memory receiver. Interrupt handlers, be receiver, process interrupts. receiving multiple interrupts executing corresponding scheduled response receipt each handler being adapted service particular event.