Uninterruptible clock supply apparatus for fault tolerant computer system
作者： Akira Yamagiwa , Soichi Takaya , Masao Inoue , Kenichi Kurosawa , Kenji Kashiwagi
DOI:
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摘要: The present invention concerns clock source switchover between dual sources in the event of failure any them without affecting output system, thereby preventing malfunctioning processors therein. In fault tolerant computer system invention, each plural processing units comprises a source, selector, stop detection unit, phase adjusting and coincidence detection/operation suppression/resetting whereby when switching over from faulty to normal failure, unit ensures continuity signals. provided subsequent stage selector inserts PLL circuit having an overdamping response characteristic obtained by lowering gain its loop filter.
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