作者: Easwaran Raman , Neil Va hharajani , Ram Rangan , David I. August
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摘要: The recent trend in the processor industry of packing multiple cores a chip has increased importance automatic techniques for extracting thread level parallelism. A promising approach parallelism general purpose applications is to apply memory alias or value speculation break dependences amongst threads and executes them concurrently.In this work, we present speculative parallelization technique called Speculative Parallel Iteration Chunk execution (Spice) which relies on novel software-only prediction mechanism. Our predicts loop live-ins only few iterations given loop, enabling start from those iterations. It also increases probability successful by predicting that values will be used as some future loop. These twin properties enable our scheme have high accuracies while exposing significant coarse-grained thread-level Spice been implemented an transformation research compiler. results up 157% speedup (101% average) with 4 threads.