作者: Nobuyuki Yoshikawa , Hiroshi Ishibashi , Masanori Sugahara
DOI: 10.1143/JJAP.34.1332
关键词:
摘要: We have investigated the basic characteristics of capacitively and resistively coupled single-electron tunneling (SET) inverters as a digital logic circuit. Static dynamic been calculated based on semiclassical model using Monte Carlo method. Although voltage gain larger than unity is found even in cascade connection two stages SET inverters, they reveal some disadvantages application, such small gain, poor input-output separation, level difference, instability operating point oscillating output voltages. The switching delay time estimated to be order 100RC, where R C resistance capacitance tunnel junction, respectively. stability levels has also verified cross-coupled latch circuits.