CMOS digital clock and data recovery circuit

摘要: An integrated circuit for recovering the clock and data information from phase-encoded serial data. The includes a synchronous delay line coupled to waveform digitizer synthesizer. receives converts into string of bits whose value represent logic levels an encoded at T p /N intervals where is reference period N resolution digitizer. may be one several such as Manchester coding. digitized output input transition detector, locations transitions (bit-boundary bit-center transitions) are extracted. AND stage comprising gates synthesizer masking out bit-boundary passes transitions. (a binary word) pair encoders. encoders adder L-type register which used compensating missing or presence two A digital filter allows present invention achieve lockon immediately phase jitter. further shifter in synthesizing on hand, providing mask other hand. synthesized by over digital-to-time domain converter Finally, regenerated D-type flip flop delayed its D also input.