Graphene transistors for CMOS applications: opportunities and challenges

摘要: In the last decade, there has been a tremendous interest in Graphene transistors. The greatest advantage for CMOS nanoelectronics applications is fact that compatible with planar technology and potentially offers excellent short channel properties. Because of zero bandgap, it will not be possible to turn off MOSFET efficiently hence typical on current ratio (Ion/Ioff) less than 10. Several techniques have proposed open bandgap Graphene. It demonstrated, both theoretically experimentally, Nanoribbons (GNR) show which inversely proportional their width. GNRs about 20 nm width bandgaps range 100meV. But very difficult obtain well defined edges. An alternate technique band gap use bilayer (BLG), an asymmetric bias applied direction perpendicular plane. Another important metric, subthreshold slope also limited by inability transistor. However, these devices could attractive RF applications. even analog non-saturating behavior drain can issue. Although some studies reported saturation, mechanisms are still clear. In this talk we present our recent findings, based simulations experiments, propose solutions high ratio. A detailed study field transport grapheme transistors, relevant presented.