A General Framework for Analysing System Properties in Platform-Based Embedded System Designs

作者: Simon Kunzli , Samarjit Chakraborty , Lothar Thiele

DOI: 10.5555/789083.1022725

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摘要: We present a framework (real-time calculus) for analysing various system properties pertaining to timing analysis, loads on components and on-chip buffer memory requirements of heterogeneous platform-based architectures, in single coherent way. Many previous analysis techniques from the real-time systems domain, which are based standard event models, turn out be special cases our framework. illustrate this using realistic examples.

参考文章(13)
Lothar Thiele, Samarjit Chakraborty, Matthias Gries, Simon Kunzli, Chapter 4 – Design Space Exploration of Network Processor Architectures Network Processor Design. pp. 55- 89 ,(2003) , 10.1016/B978-155860875-7.50022-3
Tilman Wolf, Jonathan S. Turner, Design and performance of scalable high-performance programmable routers Washington University. ,(2002)
Samarjit Chakraborty, Simon Künzli, Lothar Thiele, Andreas Herkersdorf, Patricia Sagmeister, Performance evaluation of network processor architectures: combining simulation with analytical estimation Computer Networks. ,vol. 41, pp. 641- 665 ,(2003) , 10.1016/S1389-1286(02)00454-1
Paul Pop, Petru Eles, Zebo Peng, Bus access optimization for distributed embedded systems based on schedulability analysis design, automation, and test in europe. pp. 567- 575 ,(2000) , 10.1145/343647.343857
R.A. Bergamaschi, S. Bhattacharya, R. Wagner, C. Fellenz, M. Muhlada, F. White, J.-M. Daveau, W.R. Lee, Automating the design of SOCs using cores IEEE Design & Test of Computers. ,vol. 18, pp. 32- 45 ,(2001) , 10.1109/54.953270
Kai Richter, Dirk Ziegenbein, Marek Jersak, Rolf Ernst, Model composition for scheduling analysis in platform design design automation conference. pp. 287- 292 ,(2002) , 10.1145/513918.513993
Asawaree Kalavade, Pratyush Moghé, A tool for performance estimation of networked embedded end-systems design automation conference. pp. 257- 262 ,(1998) , 10.1145/277044.277116
Samarjit Chakraborty, Matthias Gries, Simon Künzli, A framework for evaluating design tradeoffs in packet processing architectures design automation conference. pp. 880- 885 ,(2002) , 10.1145/513918.514136
K. Richter, R. Ernst, Event Model Interfaces for Heterogeneous System Analysis design, automation, and test in europe. pp. 506- 513 ,(2002) , 10.5555/882452.874327