A compression-based morphable PCM architecture for improving resistance drift tolerance
作者： Majid Jalili , Hamid Sarbazi-Azad
DOI: 10.1109/ASAP.2014.6868667
关键词:
摘要: Due to the growing demand for large memories, using emerging technologies such as Phase Change Memories (PCM) are inevitable. PCM with appropriate scalability, power consumption and multiple bits per cell storage capability is a probable candidate substituting DRAM. Although storing seems be rational response memory demands, there significant problem achieve this goal. Resistance drift an important reliability concern that coupled multi-level (MLC PCM) system. In paper, we propose system architecture that, by exploiting benefits of compression, converts resistance prone blocks resilient in order protect from drift. Evaluations on full-system simulator, consisting quad-core ALPHA CMP banked memory, show our proposed approach provides up 9.8× reduction bit error rate, average 8% energy consumption, 21% IPC improvement.
ieeecomputersociety.org参考文章(23)
Michele M. Franceschini, Luis A. Lastras-Montano, Moinuddin K. Qureshi, Improving read performance of Phase Change Memories via Write Cancellation and Write Pausing high-performance computer architecture. pp. 1- 11 ,(2010) , 10.1109/HPCA.2010.5416645
Manu Awasthi, Manjunath Shevgoor, Kshitij Sudan, Bipin Rajendran, Rajeev Balasubramonian, Viii Srinivasan, Efficient scrub mechanisms for error-prone emerging memories high performance computer architecture. pp. 1- 12 ,(2012) , 10.1109/HPCA.2012.6168941
Xiangyu Dong, Cong Xu, Yuan Xie, N. P. Jouppi, NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Nonvolatile Memory IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. ,vol. 31, pp. 994- 1007 ,(2012) , 10.1109/TCAD.2012.2185930
Jue Wang, Xiangyu Dong, Guangyu Sun, Dimin Niu, Yuan Xie, Energy-efficient multi-level cell phase-change memory system with data encoding international conference on computer design. pp. 175- 182 ,(2011) , 10.1109/ICCD.2011.6081394
Lei Jiang, Youtao Zhang, Jun Yang, ER: elastic RESET for low power and long endurance MLC based phase change memory international symposium on low power electronics and design. pp. 39- 44 ,(2012) , 10.1145/2333660.2333672
Wangyuan Zhang, Tao Li, Helmet: A resistance drift resilient architecture for multi-level cell phase change memory system dependable systems and networks. pp. 197- 208 ,(2011) , 10.1109/DSN.2011.5958219
Lei Jiang, Bo Zhao, Youtao Zhang, Jun Yang, Bruce R. Childers, Improving write operations in MLC phase change memory high performance computer architecture. pp. 1- 10 ,(2012) , 10.1109/HPCA.2012.6169027
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Jude A. Rivers, Scalable high performance main memory system using phase-change memory technology Proceedings of the 36th annual international symposium on Computer architecture - ISCA '09. ,vol. 37, pp. 24- 33 ,(2009) , 10.1145/1555754.1555760
Hyung Gyu Lee, Seungcheol Baek, Jongman Kim, Chrysostomos Nicopoulos, A Compression-Based Hybrid MLC/SLC Management Technique for Phase-Change Memory Systems ieee computer society annual symposium on vlsi. pp. 386- 391 ,(2012) , 10.1109/ISVLSI.2012.62
Nak Hee Seong, Sungkap Yeo, Hsien-Hsin S. Lee, Tri-level-cell phase change memory: toward an efficient and reliable memory system international symposium on computer architecture. ,vol. 41, pp. 440- 451 ,(2013) , 10.1145/2485922.2485960