UltraSparc I: a four-issue processor supporting multimedia

作者: M. Tremblay , J.M. O'Connor

DOI: 10.1109/40.491461

关键词:

摘要: UItraSpare I is a second-generation superscalar processor. It high performance, highly integrated, four issue processor based on the Spare Version 9 64-bit RISC architecture. We have extended core instruction set to include graphics instructions that provide most common operations related two dimensional image processing; two- and three-dimensional compression algorithms; parallel pixel data with 8-, 16-, 32-bit components. Additional, new memory access support very bandwidth requirements typical of multimedia applications.

参考文章(9)
R.K. Yu, G.B. Zyner, 167 MHz radix-4 floating point multiplier Proceedings of the 12th Symposium on Computer Arithmetic. pp. 149- 154 ,(1995) , 10.1109/ARITH.1995.465364
M. Tremblay, J.M. O'Connor, V. Narayanan, Liang He, VIS speeds new media processing IEEE Micro. ,vol. 16, pp. 10- 20 ,(1996) , 10.1109/40.526921
Brad Calder, Dirk Grunwald, Next cache line and set prediction international symposium on computer architecture. ,vol. 23, pp. 287- 296 ,(1995) , 10.1145/223982.224439
J.A. Prabhu, G.B. Zyner, 167 MHz radix-8 divide and square root using overlapped radix-2 stages Proceedings of the 12th Symposium on Computer Arithmetic. pp. 155- 162 ,(1995) , 10.1109/ARITH.1995.465363
James E. Smith, A study of branch prediction strategies international symposium on computer architecture. pp. 135- 148 ,(1981) , 10.1145/285930.285980
M. Tremblay, B. Joy, K. Shin, A three dimensional register file for superscalar processors hawaii international conference on system sciences. ,vol. 1, pp. 191- 201 ,(1995) , 10.1109/HICSS.1995.375394
Chang-Guo Zhou, Ihtisham Kabir, Leslie Kohn, Aman Jabbi, D. Rice, Xio-Ping Hu, MPEG video decoding with the UltraSPARC visual instruction set ieee computer society international conference. pp. 470- 477 ,(1995) , 10.1109/CMPCON.1995.512424
L. Kohn, G. Maturana, M. Tremblay, A. Prabhu, G. Zyner, The visual instruction set (VIS) in UltraSPARC ieee computer society international conference. pp. 462- 469 ,(1995) , 10.1109/CMPCON.1995.512423
J.H. Edmondson, P. Rubinfeld, R. Preston, V. Rajagopalan, Superscalar instruction execution in the 21164 Alpha microprocessor IEEE Micro. ,vol. 15, pp. 33- 43 ,(1995) , 10.1109/40.372349