CMOS voltage reference

作者: Kwok Tai Philip Mok , Ka Nang Leung , Ka Chun Kwok

DOI:

关键词:

摘要: A CMOS reference voltage generating circuit is described that produces a by taking the difference between gate-source voltages of two p-type and n-type transistors operating in saturation region, one being multiplied gain factor. Different circuits are for situations where n- or have greater temperature dependence.

参考文章(19)
Kerry Tedrow, Mase Taub, Neal Mielke, Precision voltage reference ,(1992)
G Tzanateas, CAT Salama, Yannis P Tsividis, None, A CMOS bandgap voltage reference IEEE Journal of Solid-state Circuits. ,vol. 14, pp. 655- 657 ,(1979) , 10.1109/JSSC.1979.1051234
G. Rincon-Mora, P.E. Allen, A 1.1-V current-mode and piecewise-linear curvature-corrected bandgap reference IEEE Journal of Solid-state Circuits. ,vol. 33, pp. 1551- 1554 ,(1998) , 10.1109/4.720402
B.S. Song, P.R. Gray, A precision curvature-compensated CMOS bandgap reference international solid-state circuits conference. ,vol. 18, pp. 634- 643 ,(1983) , 10.1109/JSSC.1983.1052013
R.A. Blauschild, P.A. Tucci, R.S. Muller, R.G. Meyer, A new NMOS temperature-stable voltage reference IEEE Journal of Solid-state Circuits. ,vol. 13, pp. 767- 774 ,(1978) , 10.1109/JSSC.1978.1052048
A.-J. Annema, Low-power bandgap references featuring DTMOSTs IEEE Journal of Solid-state Circuits. ,vol. 34, pp. 949- 955 ,(1999) , 10.1109/4.772409
G.C.M. Meijer, P.C. Schmale, K. Van Zalinge, A new curvature-corrected bandgap reference IEEE Journal of Solid-state Circuits. ,vol. 17, pp. 1139- 1143 ,(1982) , 10.1109/JSSC.1982.1051872
H. Banba, H. Shiga, A. Umezawa, T. Miyaba, T. Tanzawa, S. Atsumi, K. Sakui, A CMOS bandgap reference circuit with sub-1-V operation IEEE Journal of Solid-state Circuits. ,vol. 34, pp. 670- 674 ,(1999) , 10.1109/4.760378
Yannis P Tsividis, Richard W Ulmer, None, A CMOS voltage reference IEEE Journal of Solid-state Circuits. ,vol. 13, pp. 774- 778 ,(1978) , 10.1109/JSSC.1978.1052049
R.J. Widlar, New developments in IC voltage regulators international solid-state circuits conference. ,vol. 6, pp. 2- 7 ,(1970) , 10.1109/JSSC.1971.1050151