Acquisition process in a phase-locked-loop by switched phase means

摘要: A phase-locked-loop circuit configuration is described which eliminates the statistical nature of acquisition process, thereby improving or decreasing lock-up-time loop. The such that given an input signal, occurs at time T 0 , loop error signal reduced to a level where substantially and predictable degree certainty heretofore unattainable. In addition, by eliminating becomes function controllable system parameters, as bandwidth, gain constants.