A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture

摘要: The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs be programmed description or assembly languages, whereas programmers are familiar with algorithmic programming paradigm. SA-C been proposed an expression-oriented language designed implicitly express data operations. Morphosys is system-on-chip architecture that supports data-parallel, SIMD computational model. This paper describes compiler framework analyze programs, perform optimizations, and map onto architecture. mapping process involves operation scheduling, resource allocation binding register context execution times some compiled image-processing kernels can achieve up 42x speed-up over 800 MHz Pentium III machine.